5. Generation of the D-RAM IC503 drive voltage
T401
VCC1D405
VOLTAGE37
+
3.2[V]
C422
VIN
26
VOLTAGE
IN
19
2
OUT
3TO IC503
IC40113pin VCC
POWER CONTROL
IC402
VOUT15[V] REG.
Q40229
PCBfrom IC801
17
6pin PCON
11.5[V]
1
2[V]
0
176.4[kHz]
Fig. 4-6 D-RAM IC503 drive voltage generation circuit block diagram
The D-RAM IC503 drive voltage generation circuit block diagram is shown in Fig. 4-6. When the PLAY key is pressed, the system
controller IC801 outputs the "L" signal from pin6 [PCON]. When "L" is output, the system controller section inside the POWER CONTROL
IC401 starts up and outputs the switching waveform from pin@? [VOUT1] of IC401. As the switching waveform is output from pin@?
[VOUT1] of IC401, the STEP-UP DC-DC CONVERTER consisting of Q402, T401, D405, C422 and the output switching waveform, starts
and generates the stepped-up voltage (approx. 11 V during AC adapter drive operation) from the above described stepped-VCC voltage. The
up voltage thus generated is sent to pin2 [IN] of the 5 V REG. IC402. As the 5 V REG. IC402 starts up, +5 V is generated by the series
regulator inside IC402. The +5 V regulated power is output from pin3 [OUT] to pin!L [VCC] of the D-RAM IC503 as the voltage to drive
the D-RAM IC503.
N 44 N |