D-E771/E776CK
6-2. BLOCK DIAGRAM � POWER SUPPLY Section �
LD1, LD2LD1AUTOMATIC POWERSWITCHING6-3. IC PIN FUNCTION DESCRIPTION
(Page 13)ACONTROLREGULATOR
Q408Q406? MAIN BOARD IC801 MC68HC05L24-SC440488CFU (SYSTEM CONTROLLER)
LD2
Pin No.Pin NameI/ODescriptionPin No.Pin NameI/ODescription
VCPU
Q409, 410
1VDDNPower supply terminal (+3V)Wake-up control signal input terminal
AUTOMATIC36WPI
INM1POWER CONTROL
8�POWER CONTROLIC401Q4072DDCMUTEODC/DC converter muting control signal output terminalThe stop status is reset with the falling edge of input signal
SWITCHINP1+AUTOMATIC POWER
9
CONTROL SWITCH3DPCONO37XLTOSerial data latch pulse signal output to the D-RAM controller (IC601) (for ESP)
DC/DC converter on/off selection signal output terminal
VCPU VOLTAGE
VCPUMONITOR38XSOEOSerial data output enable signal output terminal (for ESP) Not used (pull up)
4OEOOutput enable signal output to the MPC17A51VMEL (IC504) OL� active
Q417RF1
Q4107
5VCCMNTIMain DC/DC converter voltage (+2.5V) monitor input (A/D input)39SDTOISerial data input from the D-RAM controller (IC601) (for ESP)
BATT B+Q411
DTC1UPCK1B
SWITCHING11256MDL SLIDestination setting terminal Fixed at OH� in this set40SDTIOSerial data output to the D-RAM controller (IC601) (for ESP)
PWM
VCPU424UPCK1Back light control signal output to the liquid crystal display on the switch unit41SCKOSerial data transfer clock signal output to the D-RAM controller (IC601) (for ESP)
Q4097LIGHTO
OH�: back light on Not used (open)42FOKIFocus OK signal input from the RF amplifier (IC501) OL�: NG, OH�: OK
CMP1
SYSTEM CONTROLLER10
PWMBATT B+
IC801 (2/2)RIPPLEDC/DC CONVERTER26VOUT1DTC38C2PO FILTER OC2PO (error condition monitor) filter on/off control signal output terminal43BUSYIBusy signal input from the BU9326KS (IC502) OL�: track jump mode, OH�: servo loop on
VCPUFILTERMUTE SWITCH61MOTOR/COIL DRIVER (IC504),
Q451Q452HEADPHONE AMP (IC302) B+
9DACLTOSerial data latch pulse signal output to the D/A converter (IC301)44BEEPOBeep sound output to the headphone amplifier (IC302)
DDCMUTE2
DC/DC45SCORISub-code sync (S0+S1) detection signal input from the BU9326KS (IC502)
RECTIFIERC2PO (error condition monitor) signal control output terminal
VCCCONVERTER10C2POENO
Q405
T401RECHARGEABLEOL�: stop mode, OH�: searching46IRMCIAttenuate display selection signal input from the RF amplifier (IC501)
CHARGE
BATTERY
RV40111CHGONOCharging on output to the MPC18A26VMEL (IC401) OL�: charge on
NH-DM2AA47VDDNPower supply terminal (+3V)
VCCOSC2PCS. 2.4V
Q40312RMDATI/OCommunication data in/out for the liquid crystal display with remote commander48 to 51 COM3 to COM0OCommon drive signal output to the liquid crystal display on the switch unit
D407
INP2ERROR13VLCD3O52VREFHIReference voltage input terminal (+3V) (for A/D converter)
5PWMVOUT2
AMP29
2
14VLCD2OPower supply output for the liquid crystal display bias53VREFLIReference voltage input terminal (0V) (for A/D converter)
Q453
DC/DC CONVERTERDPCON 315VLCD1O54ESPSL/TESTIService mode setting terminal OL�: service mode, Normally: fixed at OH�
DRY BATTERY
MUTE SWITCH
SIZE OAA�
VCPU16VSSNGround terminal55KEYIKey input from the switch unit (A/D input)
VCPU20REGULATORVREF(IEC DESIGNATION LR6)
CHARGE2PCS. 3V
RF3VREFERROR17VPPNPower supply terminal (0V)
35SWITCH56RMKEYIKey input from the headphone with remote commander (A/D input)
AVDDB+ SWITCHQ402, 414AMP
D/A CONVERTER (IC301) B+Q30318TONOTraverse on/off control signal output to the auto traverse circuit
57DCINMNTIDC in voltage detection input terminal (A/D input) Also used for DC IN detection
PCBJ40119XOSC2OStandby control signal output to the headphone amplifier (IC302)
PCON 2717DCIN 34Battery voltage detection input terminal
CHGONDC IN 4.5V58BATMNTI
CHGON 1118SYSTEMD415Also used for rechargeable battery/dry battery detection
CKOUTSystem reset signal input from the MPC18A26VMEL (IC401) OL�: reset
15CONTROLCHARGERS�+20RESETI
SYNC1SWITCH
D80616For several hundreds msec. after the power supply rises, OL� is input, then it changes to OH�59CHGMNT1IBattery charging voltage detection input from the MPC18A26VMEL (IC401)
Q401
RSTBLOW VCPUCHGSW 3321OSC1IMain system clock input terminal (4.195 MHz)60VSSNGround terminal
RESET 2014VCPU
DETECT
BATM22OSC2OMain system clock output terminal (4.195 MHz)
Battery voltage detection input terminal (A/D input)
CHGOUTCHARGE3261CHGMNT2I
CHGMNT1 5931
AMP30VIN23SUBQISub-code Q data signal input from the BU9326KS (IC502)Also used for rechargeable battery/dry battery detection
CHGMNT2 61
23 VGSW24CDATAOSerial data output to the D/A converter (IC301) and BU9326KS (IC502)62OSMNTIDSP offset voltage adjustment voltage monitor input from the BU9326KS (IC502)
STEP UP21
DC IN
2DC/DC
VCCMNT 5VCCDCDTB DETECTVDDREGULATORCONVERTER22Sub-code Q data reading clock signal output to the D/A converter (IC301) and BU9326KS 63 to 77 SEG0 to SEG14OSegment drive signal output to the liquid crystal display on the switch unit
IC40225
D411SQCKO
BATMNT 58BATT B+D404(IC502)78, 79SEG15, SEG16OSegment drive signal output terminal Not used (open)
Data read/write selection signal output to the BU9326KS (IC502)
DCINMNT 57A/D26RWOError correction OL�: quadruple correction, OH�: double correction
180X9326I/O
CHARGEOL�: reading mode, OH�: writing modeFixed at OL� in this set
4
MONITOR3
IC403Power on/off control signal output to the MPC18A26VMEL (IC401)
27PCONO
OL�: power on, OH�: power off
28AMUTEOAnalog muting on/off control signal output terminal OH�: muting on
CLK
(Page 13)BAVLS (Automatic Volume Limiter System) switch (S301) input terminal
29XAVLSI
OL�: limit mode, OH�: normal mode
VG
(Page 13)C
System reset signal output to the BU9326KS (IC502) and D-RAM controller (IC601)
30XRSTO
DCDTBOL�: reset
(Page 16)D
31XHOLDIHOLD switch (S804) input terminal OL�: hold on, OH�: hold off
Rechargeable battery pack detection switch input terminal OL�: rechargeable battery pack in
0532XRCHGI
Not used (open)
Sled limit-in detection switch (S901) input terminal
33XLMTI
The optical pick-up is inner position when OL�
34XRSMIRESUME switch (S803) input terminal OL�: resume on, OH�: resume off
CD door open/close detection switch (S801) input terminal
35OPENI
The stop status is reset with the falling edge of input signal
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