7-13. IC PIN FUNCTION DESCRIPTION
? MAIN BOARD IC201 CXP84332-210Q (SYSTEM CONTROLLER)
Pin No.Pin NameI/ODescription
1 to 3NONot used (open)
Motor drive signal (load chucking direction) output to the chucking motor drive (IC52)
4CH.FO
OL� active *1
Motor drive signal (save direction) output to the chucking motor drive (IC52)
5CH.RO
OL� active *1
Chucking end detect switch (SW11) input terminal
6LOAD2I
OL�: When completion of the disc chucking operation
Save end detect switch (SW12) input terminal
7LOAD1I
OL�: When completion of the disc chucking operation
8SENS2IInternal status signal (sense signal) input from the CXA1992BR (IC11)
Sled limit in detect switch (SW1) input terminal
9LIM.SWI
OL�: When the optical pick-up is inner position
10EE.INITIInitialize signal input for the EEPROM (IC202) OH�: format Fixed at OL� in this set
11EE.CLKOSerial data transfer clock signal output to the EEPROM (IC202)
12EE.DATAI/OTwo-way data bus with the EEPROM (IC202)
13 to 19NONot used (open)
Setting terminal for the single disc/multiple discs mode
20SINGLEI
OL�: single mode, OH�: multiple discs mode (fixed at OH�)
System reset signal output to the CXA1992BR (IC11), CXD2530Q (IC101) and CXD2522Q
21XRSTO
(IC401) OL�: reset
22FOKIFocus OK signal input from the CXA1992BR (IC11) OL�: NG, OH�: OK
23SENSIInternal status signal (sense signal) input from the CXD2530Q (IC101)
24GFSIGuard frame sync signal input from the CXD2530Q (IC101) OL�: NG, OH�: OK
25GRSRTOReset signal output to the CXD2522Q (IC401) OL�: reset
26XQOKOSubcode Q OK pulse signal output to the CXD2522Q (IC401) OL� active
27SDTIIESP status signal input from the CXD2522Q (IC401)
28XSOEOESP status read enable signal output to the CXD2522Q (IC401) OL� active
29ESPXLTOESP latch pulse signal output to the CXD2522Q (IC401) OL� active
System reset signal input from the SONY bus interface (IC302) and reset signal generator
30RSTI(IC304) OL�: reset
For several hundreds msec. after the power supply rises, OL� is input, then it changes to OH�
31EXTALIMain system clock input terminal (8 MHz)
32XTALOMain system clock output terminal (8 MHz)
33VSSNGround terminal
34TXOSub system clock output terminal Not used (open)
35TEXISub system clock input terminal Not used (fixed at OL�)
36AVSSNGround terminal (for A/D converter)
37AVREFIReference voltage (+5V) input terminal (for A/D converter)
Input of signal for the fine adjustment (linear position sensor adjustment; RV201) of elevator
38MCKI
position (A/D input)
39EHSIElevator height position detect input from the RV202 (elevator height sensor) (A/D input)
40MODELISetting terminal for the destination (fixed at OH� in this set)
41XRDEOD-RAM read enable signal output to the CXD2522Q (IC401) OL� active
42XWREOD-RAM write enable signal output to the CXD2522Q (IC401) OL� active
43A.MUTEOAudio line muting on/off control signal output terminal OH�: muting on
44EMPOEmphasis mode output to the D/A converter (IC601) OH�: emphasis on
45MLOFast speed dubbing control signal output to the D/A converter (IC601) OL�: fast speed
46GRSCORISubcode sync (S0+S1) detection signal input from the CXD2522Q (IC401)
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ACEC
