pull up the Ik detection terminal to 12 V in order toC518.) The signal that is output from IC503 pins-9 and -
prevent the protector circuit from erroneous operation.10 is sent to IC506 pins-10 and -12 to generate the signal
The operating point of the Ik protector is ABL current =that drives the FET in the subsequent circuit. The FET
630 mA.gate receives the signal that repeats High and Low only
during the period when the PWM output is oscillating so
. HV +B OCP Protectorthat the FET is turned on and off repeatedly. When the
The HV +B OCP protector is the circuit that holds downFET is turned on, a current flows from the 120 V line to
the high voltage when the current flowing through thethe degauss line so that the CRT is degaussed.
DC. IN line exceeds the set value due to any abnormality
or trouble.. Heater circuit
The DC IN line voltage is voltage-divided by theThe heater circuit consists of the DC-DC converter
resistors R1522 to R1524 that is sent to Q512 emitter.IC510 and the peripheral circuit. The voltage that is
The Q512 base receives the following voltage.obtained by rectifying the pin-8 OH1� using the FBT pin-
Vb (Q512) = DC. IN _ R568 x 1 (DC. IN) _ Vf (D536)7 output OH2� as the reference, is used as the power
When the relation of Ve_Vb 3= Vbe (Q512) is estab- supply of IC510. The voltage that is obtained by
lished, Q512 turns on so that the protector outputrectifying the IC output with D530 and L505, is voltage-
terminal is latched to the OL� level by the circuit of Q516divided by resistors. The voltage that is obtained by the
and Q519. D536 is inserted in order to cancel theresistor-division is returned to IC510 as the feedback.
temperature characteristics of the Vbe voltage. TheThe heater circuit uses the step-down converter circuit as
operating point of the HV +B OCP protector is I currentits circuit configuration. The heater voltage that is
(DC. IN) = about 2.4 [A].applied to CRT is 4.5 Vrms.
. HV +B OVP Protector
The HV +B OVP protector is the circuit that holds down6-7.HA, HB and HC boards
the high voltage when the HV +B line voltage exceedsKey scan and turning on and off the LEDs
the set value or when HV voltage abnormally decreasesThe SUB CPU (IC on the HC board) sends out the LED on
due to any abnormality or trouble.signal and the key scan output signal using the serial signal
The HV +B line voltage is voltage-divided by the(MISO, MOSI, SCLK). It receives the key scan input
resistors R1514 and R1513 to activate the protector. Thesignal.
operating point of the HV +B OVP protector is about
120 [V]. On the other hand, the detected output of the
high voltage of the FBT is compared with the voltage6-8.HD board
level that is voltage-divided by R1532 and R1533 so thatAn input signal is selected from the various input signals
the abnormally low voltage from the FBT high voltagethat are connected to the AUDIO INPUT connectors (1, 2
output can be detected in such a case of FBT layer short,and 3). It amplifies the selected audio signal and outputs
and the protector is activated in such an error. However,the audio signal to speakers.
this protector has a longer time constant that prevents the
protector circuit from erroneous operation. The operat-
ing point of this protector is HV voltage L 6 [kV].
. Degauss Circuit
The degauss circuit consists of the PWM controller
IC503, the high withstand voltage FET driver IC506, the
drive FET Q517 and the peripheral circuit.
When the main power is turned on or when the manual
degauss is turned on, the control signal ODEGAUSS
ON� that is sent to CN501 pin-8 is detected at its rise-up
edge that sets OL� to IC503 DTC and to start oscillating
the PWM output. (Length of the oscillating period is
determined by the time constant of R518, R519 and
6-8BVM-D9H1U/D9H5U/D9H1E/D9H5E/D9H1A/D9H5A |
ACEC
